/**
 * @file	main.c
 * @author	chipsea
 * @brief	
 * @version	0.1
 * @date	2020-11-30
 * @copyright Copyright (c) 2020, CHIPSEA Co., Ltd.
 * @note
 */
#include "sdk_config.h"
#include "gpio.h"
#include "mcu.h"
#include "log.h"
#include "gpio.h"
#include "clock.h"
#include "timer.h"
#include "flash.h"
#include "pwrmgr.h"
#include "version.h"
#include "cst92f2x.h"
#include "jump_function.h"
#include "rf_phy_driver.h"

#define DEFAULT_UART_BAUD   115200

/*********************************************************************
*  CONNECTION CONTEXT RELATE DEFINITION
*/
#define   BLE_MAX_ALLOW_CONNECTION              1
#define   BLE_MAX_ALLOW_PKT_PER_EVENT_TX        3
#define   BLE_MAX_ALLOW_PKT_PER_EVENT_RX        3
#define   BLE_PKT_VERSION                       BLE_PKT_VERSION_5_1  

/*********************************************************************
 * EXTERNAL FUNCTIONS
 */
extern int app_main(void);
extern void init_config(void);
extern void hal_rom_boot_init(void);


#define   BLE_PKT_BUF_SIZE                  (((BLE_PKT_VERSION == BLE_PKT_VERSION_5_1) ? 1 : 0) *  BLE_PKT51_LEN \
	                                        + ((BLE_PKT_VERSION == BLE_PKT_VERSION_4_0) ? 1 : 0) * BLE_PKT40_LEN \
	                                        + (sizeof(struct ll_pkt_desc) - 2))

#define   BLE_MAX_ALLOW_PER_CONNECTION          ( (BLE_MAX_ALLOW_PKT_PER_EVENT_TX * BLE_PKT_BUF_SIZE*2) \
                                                 +(BLE_MAX_ALLOW_PKT_PER_EVENT_RX * BLE_PKT_BUF_SIZE)   \
                                                 + BLE_PKT_BUF_SIZE )

#define   BLE_CONN_BUF_SIZE                 (BLE_MAX_ALLOW_CONNECTION * BLE_MAX_ALLOW_PER_CONNECTION)


__align(4) uint8            g_pConnectionBuffer[BLE_CONN_BUF_SIZE];
llConnState_t               pConnContext[BLE_MAX_ALLOW_CONNECTION];

/*********************************************************************
*   CTE IQ SAMPLE BUF config
*/
//#define BLE_SUPPORT_CTE_IQ_SAMPLE TRUE
#ifdef BLE_SUPPORT_CTE_IQ_SAMPLE 
uint16 g_llCteSampleI[LL_CTE_MAX_SUPP_LEN * LL_CTE_SUPP_LEN_UNIT];
uint16 g_llCteSampleQ[LL_CTE_MAX_SUPP_LEN * LL_CTE_SUPP_LEN_UNIT];
#endif


/*********************************************************************
*  OSAL LARGE HEAP CONFIG
*/
#define     LARGE_HEAP_SIZE  (3*1024)
uint8       g_largeHeap[LARGE_HEAP_SIZE];

/*********************************************************************
 * GLOBAL VARIABLES
 */
volatile uint8 g_clk32K_config;
volatile sysclk_t g_spif_clk_config;


/*********************************************************************
 * EXTERNAL VARIABLES
 */
extern uint32_t  __initial_sp;

/**
 * @fn      void hal_low_power_io_init(void)
 * @brief   IO initialization for low power
 * @param   none
 * @return  none
 */
static void hal_low_power_io_init(void)
{
   ///< pull all io to gnd by default
    ioinit_cfg_t ioInit[]= {
       {GPIO_P02,   GPIO_FLOATING   },/*SWD*/
       {GPIO_P03,   GPIO_FLOATING   },/*SWD*/
       {GPIO_P09,   GPIO_PULL_UP    },/*UART TX*/
       {GPIO_P10,   GPIO_PULL_UP    },/*UART RX*/
       {GPIO_P11,   GPIO_PULL_DOWN  },
       {GPIO_P14,   GPIO_PULL_DOWN  },
       {GPIO_P15,   GPIO_PULL_DOWN  },
       {GPIO_P16,   GPIO_FLOATING   },
       {GPIO_P18,   GPIO_PULL_DOWN  },
       {GPIO_P20,   GPIO_PULL_DOWN  },
       {GPIO_P00,   GPIO_PULL_DOWN  },
       {GPIO_P01,   GPIO_PULL_DOWN  },
       {GPIO_P07,   GPIO_PULL_DOWN  },
       {GPIO_P17,   GPIO_FLOATING   },/*32k xtal*/
       {GPIO_P23,   GPIO_PULL_DOWN  },
       {GPIO_P24,   GPIO_PULL_DOWN  },
       {GPIO_P25,   GPIO_PULL_DOWN  },
       {GPIO_P26,   GPIO_PULL_DOWN  },
       {GPIO_P27,   GPIO_PULL_DOWN  },
       {GPIO_P31,   GPIO_PULL_DOWN  },
       {GPIO_P32,   GPIO_PULL_DOWN  },
       {GPIO_P33,   GPIO_PULL_DOWN  },
       {GPIO_P34,   GPIO_PULL_DOWN  },
    };
    for(uint8_t i=0;i<sizeof(ioInit)/sizeof(ioinit_cfg_t);i++)
        HalGpioPupdConfig(ioInit[i].pin,ioInit[i].type);

    DCDC_CONFIG_SETTING(0x0a);
    DCDC_REF_CLK_SETTING(1);
    DIG_LDO_CURRENT_SETTING(0x01);
    hal_pwrmgr_RAM_retention(RET_SRAM0|RET_SRAM1|RET_SRAM2);
    hal_pwrmgr_RAM_retention_set(); 
    //hal_pwrmgr_LowCurrentLdo_enable();
 
}

/**
 * @fn      void ble_mem_init_config(void)
 * @brief   memory initialization
 * @param   none
 * @return  none
 */
static void ble_mem_init_config(void)
{
    	
    osal_mem_set_heap((osalMemHdr_t *)g_largeHeap, LARGE_HEAP_SIZE);
    
    LL_InitConnectContext(pConnContext, 
                        g_pConnectionBuffer, 
                        BLE_MAX_ALLOW_CONNECTION, 
                        BLE_MAX_ALLOW_PKT_PER_EVENT_TX,
                        BLE_MAX_ALLOW_PKT_PER_EVENT_RX,
                        BLE_PKT_VERSION);
    
#ifdef	BLE_SUPPORT_CTE_IQ_SAMPLE 				
	LL_EXT_Init_IQ_pBuff(g_llCteSampleI,g_llCteSampleQ);
#endif
    
}

/**
 * @fn      void hal_rfphy_init(void)
 * @brief   rf initialization
 * @param   none
 * @return  none
 */
static void hal_rfphy_init(void)
{
    ///< config the txPower
    g_rfPhyTxPower  = DEFAULT_TX_POWER ;
    ///< config BLE_PHY TYPE
    g_rfPhyPktFmt   = PKT_FMT_BLE1M;
    ///< config RF Frequency Offset
    g_rfPhyFreqOffSet   =RF_PHY_FREQ_FOFF_00KHZ;
    ///< config xtal 16M cap
    XTAL16M_CAP_SETTING(0x09);
    XTAL16M_CURRENT_SETTING(0x01);

    hal_rom_boot_init();

    NVIC_SetPriority((IRQn_Type)BB_IRQn,    IRQ_PRIO_REALTIME);
    NVIC_SetPriority((IRQn_Type)TIM1_IRQn,  IRQ_PRIO_HIGH);     ///< ll_EVT
    NVIC_SetPriority((IRQn_Type)TIM2_IRQn,  IRQ_PRIO_HIGH);     ///< OSAL_TICK
    NVIC_SetPriority((IRQn_Type)TIM4_IRQn,  IRQ_PRIO_HIGH);     ///< LL_EXA_ADV

    ///< ble memory init and config
    ble_mem_init_config();

}

/**
 * @fn      void hal_init(void)
 * @brief   hal initialization
 * @param   none
 * @return  none
 */
static void hal_init(void)
{
    hal_low_power_io_init();
    clk_init(g_system_clk); ///< system init
    hal_rtc_clock_config((CLK32K_e)g_clk32K_config);   //(CLK32K_e)g_clk32K_config

    hal_pwrmgr_init();
    
    HalFlashInit();
    
    LOG_INIT();
    HalGpioInit();				
}

/**
 * @fn      main
 * @brief   main program
 * @param   none
 * @return  none
 */
int main(void)
{
	g_system_clk = (sysclk_t)DEFAULT_SYS_CLK_SRC;
	g_clk32K_config = DEFAULT_32K_CLK_SRC;

	drv_irq_init();

	init_config();

	hal_rfphy_init();

	hal_init();

	LOG("CST92F2x SDK V%d.%d\r\n", SDK_VER_MAJOR, SDK_VER_MINOR);
	LOG("[RESET CAUSE] %d\r\n ",g_system_reset_cause);
	app_main();
}
